Overview:
WHAT YOU DO AT AMD CHANGES EVERYTHING
We care deeply about transforming lives with AMD technology to enrich our industry, our communities, and the world. Our mission is to build great products that accelerate next-generation computing experiences - the building blocks for the data center, artificial intelligence, PCs, gaming and embedded. Underpinning our mission is the AMD culture. We push the limits of innovation to solve the world's most important challenges. We strive for execution excellence while being direct, humble, collaborative, and inclusive of diverse perspectives.
AMD together we advance_ Responsibilities:
THE TEAM:
AMD's Data Center GPU organization is transforming the industry with our AI based Graphic Processors. Our primary objective is to design exceptional products that drive the evolution of computing experiences, serving as the cornerstone for enterprise Data Centers, (AI) Artificial Intelligence, HPC and Embedded systems. If this resonates with you, come and joining our Data Center GPU organization where we are building amazing AI powered products with amazing people.
THE ROLE:
The Datacenter Graphics and Accelerated Computing Validation Team is looking for a dynamic and energetic engineer to join our growing post-silicon validation team. The Memory sub-system validation engineer is responsible to drive and deliver pre- and post-silicon validation and characterization of on-die High-Bandwidth Memory (HBM) on AMD's Datacenter GPU (Machine Instinct product). High Bandwidth Memory sub-system is at heart of complex technology that delivers industry leading Datacenter solutions for Machine Learning (ML), and High-Performance Computing (HPC). In this wide-ranging role, validation lead is the critical interface between DRAM architecture, Memory Controller Design and DV, DDR PHY, DRAM product engineering, and software teams to ensure that advanced memory technologies are delivered from architecture to mass production to AMD's quality and industry standards. The validation team fosters and encourages continuous technical innovation to showcase successes as well as facilitate continuous career development.
THE PERSON:
An experienced self-starter with the ability to execute complex test plans independently and collaborate with cross-function teams to debug and resolve issues. As a valued team member, you will work with internal engineering teams and external partners in an exciting lab environment to enable, debug and qualify the latest memory technologies coming to the market for use with leading edge AMD Datacenter SOC's.
KEY RESPONSIBILITIES:
Memory Sub-system Validation engineer's responsibility includes all aspects of pre- and post-silicon validation from planning, execution and debug. Develop and execute test plans for HBM Functional and Electrical Validation (PVT Shmoo Characterization). The sought-after candidate possess extensive knowledge of high bandwidth memory subsystem, including SoC memory architecture, Unified Memory controller, PHY design and high speed IO interface, DRAM device, and associated calibration/training mechanisms.
PREFERRED EXPERIENCE:
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