Job Description

and Requirements

At Synopsys, we are at the heart of the innovations that change the way we work. Self-driving cars. Artificial Intelligence. The cloud. 5G. The Internet of Things. These breakthroughs are ushering in the Era of Smart Everything. If you share our passion for innovation, we want to meet you.

We are seeking for Physical Design Methodology Engineers with excellent automation and data analysis skills. This role involves developing RTL2GDS design data analytics workflows that can help improve the design closure process.

This role provides a unique opportunity to solve Chip Design data analysis problems using state-of-art Big Data analytics techniques. The role is positioned at the intersection of Big Data Analytics/ML and Chip Design Methodology Development. In this role, you will be uniquely positioned to change the way Designs are done by deploying Big Data Analytics into Chip Design Methodology to improve designers\' productivity.

Key Qualifications: * Motivation to learn and explore new technologies and demonstrates good examination and problem-solving skills.

• Working at a very detailed and collaborative level with Customers, R&D engineers, Product engineers, other Field engineers, Executives.
• Communicating complex ideas to users: internal and external, written and verbal, formal and informal.
• Driving for improved customer success through novel techniques through all phases of the IC design workflow.
• Identify bottlenecks and propose solutions for enhancing power, performance, and area in front-end design.
• Create data visualizations and reports to communicate findings and recommendations to stakeholders.

Preferred Experience: * BS/MS/Phd in EE, CS, CE or related discipline and 10+ years of experience.

• Excellent experience with Design Implementation process from RTL Synthesis to PNR
• Exceptional knowledge of Synopsys Fusion Design Implementation solution including Fusion Compiler, IC Compiler2, PrimeTime, StarRCXT, ICV.
• Sound expertise of Design Timing and Power Optimization techniques
• Solid knowledge of Technology/Library Collateral needed to help design Implementation Flows.
• Knowledge of STD Cell design and characterization process
• The role involves extensive partnership with Technology/Process and Library Development teams to excellent written and verbal communication skills are a must.
• Excellent automation skills in TCL are a must.
• Python skills will be a big positive.
• Excellent Data Analytics Knowledge using Python and Pandas

Qualification and Experience

BTech/BS/MTech in EE/ECE/CS with 8 to 15 years of relevant experience

Hire Type

Employee

Job Category

Engineering

Job Subcategory

Solutions Engineering

Synopsys