Job Description

Business Line Description

Be an integral member of a highly-experienced team in R&D that is responsible for developing IP (Intellectual Property) used in the design of advanced microcontrollers and microprocessors. The IP for which this team is responsible enables a product portfolio with billion USD in annual revenue. Chances are that the car you drive, the intelligent devices that pervade your living space and the factories that produce the goods you use will contain one or more of the chips that you contribute to. We are part of Advanced Chip Engineering, a central design organization within NXP, developing products for multiple business lines in Automotive, Internet of Things (IoT), Networking, and Radio Frequency products, with expertise in hardware engineering, including architecture, IP, and full SoC Design.

Job Summary:

In this role, you would contribute to the verification of a leading edge hardware design/system. You would:


Develop software solutions for the verification of the hardware System On Chip (SoC) products Develop, execute and debug a wide range of functional and system tests and checks to validate hardware design and performance Work with IC Design and System architects to develop test plans based on Design specification

Job Qualifications:

In order to apply for this position, the candidate must be:


Available to work the 4, 8 or 12 month work term Working towards a bachelor degree in Software or Computer Engineering, Electrical Engineering or Computer Science program Strong knowledge of C/C++, object-oriented programming Focus on quality of results, with proven problem-solving abilities. Ability to communicate in English and work effectively within a team



The following skills are highly desirable:


Good knowledge of Unix/Linux, Perl Knowledge of FPGA, System Verilog and/or other verification languages and simulators Student work experience in hardware design or verification environment Knowledge of digital design verification including test environment implementation and test plan development L2 and L3 networking protocols implementation (e.g. Eth/IP/TCP/UDP)

Office location:

Ottawa, Canada





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