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THE ROLE: AMD is seeking an experienced I/O Performance Modeling Architect to drive best-in-class I/O performance for AMD processors and accelerators. You would be involved in early architectural concept-vetting, pre-RTL-start, and support RTL development through to Performance Verification signoff and RTL-to-model-correlation. Including aiding in post-silicon performance analysis and optimization, cross-referencing performance data from the lab and/or emulation, to performance results predicted from simulation and architectural models.
The role involves assisting in determining performance requirements for silicon design teams by a variety of means from speeds and feeds calculations and tabulation to use of probabilistic and/or correlated detailed performance models, to analysis and investigation of various workloads on existing silicon. It also involves designing performance case studies, defining and using hardware performance counters, identifying and interpreting useful lab traces, and using a variety of means of anticipating and analyzing performance bottlenecks in hardware and/or hardware/firmware.
THE PERSON: As a member of the I/O Performance Architecture team, you would provide guidance and feedback to IP design teams, performance modeling teams, multi-subsystem and SoC performance verification teams, and post-silicon performance validation and optimization teams. You would leverage existing designs and performance models to inform future architectural decisions, drive performance optimization initiatives across team boundaries, and communicate with senior technical leadership and key customers.
PRIMARY RESPONSIBILITIES: Determine and articulate I/O performance goals, strategy, and methodology Specify and maintain per-project I/O performance bounding box, workloads, topology, and bandwidth, QoS, and latency targets Define and drive performance features into product plans and IP level silicon design Propose and oversee architectural case studies involving existing silicon, RTL and/or performance models Review Performance Verification test plans (IP, Multi-subsystem, and SoC, as applicable) Support performance debugging in simulation, emulation and post-silicon Investigate performance results from regressions and interpret findings for follow-up actions Analyze trace captures from post-silicon application workloads Interface with SoC and IP Architects, Performance Verification Leads, and in various Performance Working Groups Provide direction to performance model development Communicate openly and clearly in meetings, presentations, emails, and reports to engineering and engineering management
PREFERRED EXPERIENCE: PC System Architecture and I/O Connectivity Protocols: PCI Express, CXL Data Center I/O Workloads, and understanding memory bandwidth and performance I/O Virtualization (x86, ARM), Shared Virtual Memory and MMU working knowledge Accelerators
ACADEMIC CREDENTIALS: Bachelor\'s or Master\'s Degree in Electrical and Computer Engineering
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Benefits offered are described: AMD benefits at a glance.
AMD does not accept unsolicited resumes from headhunters, recruitment agencies, or fee-based recruitment services. AMD and its subsidiaries are equal opportunity, inclusive employers and will consider all applicants without regard to age, ancestry, color, marital status, medical condition, mental or physical disability, national origin, race, religion, political and/or third-party affiliation, sex, pregnancy, sexual orientation, gender identity, military or veteran status, or any other characteristic protected by law. We encourage applications from all qualified candidates and will accommodate applicants\xe2\x80\x99 needs under the respective laws throughout all stages of the recruitment and selection process.
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